Field of Invention
The present invention relates to a semiconductor structure and a manufacturing method of the semiconductor structure.
Description of Related Art
A typical semiconductor structure includes a wafer substrate having a through hole, a first isolation layer, a conductive pad, a second isolation layer, and a redistribution layer. The first isolation layer is located on the surface of the wafer substrate and covers an end of the through hole of the wafer substrate. After the first isolation layer and the conductive pad are formed on the surface of the wafer substrate, an opening is formed by photolithography (e.g., dry-etching process) in the first isolation layer on the conductive pad, such that the conductive pad is exposes through the opening of the first isolation layer. Thereafter, the second isolation layer is formed on the first isolation layer and the conductive pad that is in the opening of the first isolation layer. Subsequently, another opening is photo lithographically formed in the second isolation layer on the conductive pad, and the redistribution layer is formed on the second isolation layer and the conductive pad that is in the opening of the second isolation layer, such that the redistribution layer electrically contacts the conductive pad.
However, when the dry-etching process is performed in the first isolation layer that is on the conductive pad to form the opening, a V-shaped recess may be simultaneously formed in the conductive pad due to the process limitation. As a result, when the redistribution layer electrically contacts the conductive pad, the contact area therebetween is too small to provide a sufficient electrical contact, which reduces the yield rate. Moreover, if the thickness of the conductive pad becomes thinner, the conductive pad is more easily penetrated by the formation of the V-shaped recess in the dry-etching process, thereby damaging other elements under the conductive pad.